In recent years, mobile information processing devices are very widespread. Mobile telephone devices, mobile personal computers, mobile personal digital assistants, and the like are representatives thereof. These mobile terminal devices are all operated while being driven by batteries. Therefore, in order to be able to use the device for a longer time, development has been conducted so as to reduce power consumption.
Particularly in mobile telephone devices, as on-board functions are increased (hereinafter referred to as an increase in the variety of on-board functions), the performance of CPUs is dramatically improved. Therefore, the proportion of power consumption of a CPU with respect to a whole device is increasing year by year, and therefore, a power saving technique for CPUs is required. Also, due to the increase of the variety of on-board functions, there is a disparity between high system requirements and low system requirements.
For example, orthodox processes, such as a process for a standby screen of a mobile telephone device, a process for displaying a clock, and the like, have low system requirements. On the other hand, processes for new additional functions, such as a process for displaying moving images, television telephony, and the like, have high system requirements. As can be seen from these examples, there is a significant difference in CPU processing load between processes having low system requirements and processes having high system requirements. CPUs need to execute processes having high system requirements as well as processes having low system requirements, and therefore, need to have performance which satisfies all system requirements. However, there is only a handful of functions which fully utilize the performance of a CPU in a whole system.
Therefore, an information processing device which comprises a main CPU and a sub-CPU which has power consumption lower than that of the main CPU, has been proposed (see Patent Document 1). In the conventional information processing device of Patent Document 1, the main CPU and peripheral devices in a control of the main CPU are directly connected to each other, and the sub-CPU and peripheral devices in a control of the sub-CPU are directly connected to each other. Thereby, the conventional information processing device can cause the sub-CPU to execute processes having small loads, such as waiting for user's key input, timer event, and the like. Therefore, the main CPU is not uselessly executed during the time when a process having a small load is executed, thereby reducing power consumption.    Patent Document 1: Japanese Patent Laid-Open Publication No. H04-309110